Electrical connectors are used for the completion of electrical circuits between different pieces of electrical equipment. Often, the equipment receiving such an electrical connection is susceptible to static discharge, known as electro-static discharge, or ESD. ESD is a serious problem in modern electrical equipment. The current developed between two conductive surfaces having different charges is: ##EQU1##
As can be seen from this equation, the maximum developed current is related to the difference in charge between the two surfaces. In the case of two conductors of different charge coming into contact, the equation would indicate unlimited current flow. In practice, there are actually two limiting factors of interest. The first limiting factor is the resistance between the two conductors. In this case, where the charge developed is applied across the input of a sensitive electron device, the device itself may be the source of this resistance, and the analysis of this dissipation is complicated by the highly non-linear characteristics of most modern electron device. The second limiting factor is the absolute energy available for destructive device breakdown. The energy U in a charge Q present in a capacitor having capacitance C is ##EQU2##
With modern small device geometries, this device breakdown energy is low, and will become lower as more sensitive devices and higher frequency devices utilizing these smaller device geometries become available.
Prior art patents have disclosed different classes of protection. These will be described in terms of the scope of protection. The first class of protection represents additions to integrated circuits to make them more ESD resistant. Examples are U.S. Pat. Nos. 5,532,901 and 5,654,860 for protective devices to be incorporated into an integrated circuit. U.S. Pat. No. 4,677,520 is for a protective device which operates external to an IC, but within the package of the IC. Another class described offers protection to the printed circuit boards which ordinarily interconnect many of the previously described integrated circuits. U.S. Pat. Nos. 5,563,450, 4,223,368, and 5,164,880, and 5,537,294 describe grounding clips to be used to protect the circuit boards from the application of ESD to these exposed connectors. These techniques are useful for increasing the immunity of semiconductor devices to ESD. Another class of disclosure represents packaging intended to prevent the application of ESD to the printed circuit board during handling, such as U.S. Pat. No. 5,405,000. Another class of protection is for electronics enclosed in a removable cartridge. U.S. Pat. No. 5,031,076 discloses the inclusion of a conductive material surrounding the enclosed electronics, and U.S. Pat. No. 5,357,402 discloses a grounding spring for the discharge of static charge. Another class of prior art is directed to connectors which operate to minimize the transfer of static charge into the sensitive signal pins. This is accomplished through the introduction of an conductive shield around the connector, wherein the signal pins are concealed within this shield to encourage charge to travel through the exposed conductive shield rather than sensitive signal pins. Examples of such art include U.S. Pat. Nos. 5,161,991, 5,167,516, 5,224,878, 5,256,074, 5,256,085, and 5,342,220. These devices do not address the removal of charge present on signal lines, but instead provide some type of discharge mechanism between the signal pins and conductive shield. Examples of this include U.S. Pat. Nos. 5,147,223, 5,567,168. A final class of ESD protection is disclosed in U.S. Pat. No. 5,268,592 for which a staggered length set of connector pins are used to activate FET switches to enable signals at different times, selected in accordance to when the risk of ESD transfer is minimized.